Modeling and pareto optimization of microfabricated inductors for power supply on chip

IEEE Transactions on Power Electronics

Volumn 28, Issue 9, 2013, Pages 4422-4430

  Andersen, Toke M ^a   Zingerli, Claudius M ^a   Krismer, Florian ^a   Kolar, Johann W ^a   Wang, Ningning ^b   Mathuna, Cian ^b  

^a ETH ZURICH   (Switzerland)

^b UNIVERSITY COLLEGE CORK   (Ireland)

Author keywords

Modeling; optimization methods; thin film inductors

Indexed keywords

ACCURATE ANALYSIS; ANALYTICAL EXPRESSIONS; BUCK CONVERTERS; COPPER LOSS; CORE LOSS; DESIGN SPACES; FINITE ELEMENT METHOD SIMULATION; HIGH POTENTIAL; INDUCTOR CURRENTS; MICROFABRICATED; MODELING AND OPTIMIZATION; OPTIMIZATION METHOD; PARETO FRONT; PARETO OPTIMIZATION; POWER DENSITIES; POWER SUPPLY; POWER SUPPLY-ON-CHIP; RESEARCH ACTIVITIES; THIN FILM INDUCTORS;

MICROFABRICATION; MODELS; SWITCHING FREQUENCY;

ELECTRIC INDUCTORS;

EID: 84874625776     PISSN: 08858993     EISSN: None     Source Type: Journal    
DOI: 10.1109/TPEL.2012.2227815     Document Type: Article

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