Calibration of inductance calculations to measurement data for superconductive integrated circuit processes

IEEE Transactions on Applied Superconductivity

Volumn 23, Issue 3, 2013, Pages

  Fourie, Coenrad J ^a  

^a STELLENBOSCH UNIVERSITY   (South Africa)

Author keywords

Calibration; InductEx; layout extraction; numerical inductance calculation; segment size

Indexed keywords

EXTRACTION ACCURACY; INDUCTANCE CALCULATION; INDUCTANCE EXTRACTION; INDUCTEX; LAYER PARAMETERS; LAYOUT EXTRACTION; MEASUREMENT DATA; NUMERICAL INDUCTANCE CALCULATION; PROCESS PARAMETERS; ROOT-MEAN SQUARE ERRORS; RSFQ LOGIC; SEGMENT SIZE; TEST STRUCTURE; WAFER STEPPER;

CALIBRATION; LOGIC DEVICES;

INDUCTANCE;

EID: 84873427204     PISSN: 10518223     EISSN: None     Source Type: Journal    
DOI: 10.1109/TASC.2012.2234815     Document Type: Article

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