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Volumn 15, Issue 2 PART I, 2005, Pages 300-303

Simulated inductance variations in RSFQ circuit structures

Author keywords

FastHenry; Inductance calculation; Inductance variation; InductEx; Moats

Indexed keywords

COMPUTER AIDED DESIGN; COMPUTER SIMULATION; ELECTRIC CURRENTS; FAULT TOLERANT COMPUTER SYSTEMS; INDUCTANCE; JOSEPHSON JUNCTION DEVICES; MATHEMATICAL MODELS; MICROSTRIP LINES; NORMAL DISTRIBUTION;

EID: 22044455439     PISSN: 10518223     EISSN: None     Source Type: Journal    
DOI: 10.1109/TASC.2005.849806     Document Type: Conference Paper
Times cited : (21)

References (15)
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  • 2
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    • Automated calculation of mutual inductance matrices of multilayer superconductor integrated circuits
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  • 7
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    • C. J. Fourie and W. J. Perold, "Reflection plane placement in numerical inductance calculations using the method of images for thin-film superconducting structures," SAIEE Trans., vol. 94, pp. 18-24, Jul. 2003.
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    • Fourie, C.J.1    Perold, W.J.2
  • 8
    • 0042442262 scopus 로고    scopus 로고
    • On using finite segment methods and images to establish the effect of gate structures on inter-junction inductances in RSFQ circuits
    • Jun.
    • _, "On using finite segment methods and images to establish the effect of gate structures on inter-junction inductances in RSFQ circuits," IEEE Trans. Appl. Supercond., vol. 13, pp. 539-542, Jun. 2003.
    • (2003) IEEE Trans. Appl. Supercond. , vol.13 , pp. 539-542
  • 10
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    • M. Kamon, M. J. Tsuk, and J. K. White, "FastHenry: A multipole-accelerated 3-d inductance extraction program," IEEE Trans. Microwave Theory Tech., vol. 42, pp. 1750-1758, Sep. 1994.
    • (1994) IEEE Trans. Microwave Theory Tech. , vol.42 , pp. 1750-1758
    • Kamon, M.1    Tsuk, M.J.2    White, J.K.3
  • 11
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    • Complete Monte Carlo model description of lumped-element RSFQ logic circuits
    • to be published
    • C. J. Fourie, W. J. Perold, and H. R. Gerber, "Complete Monte Carlo model description of lumped-element RSFQ logic circuits," IEEE Trans. Appl. Supercond., to be published.
    • IEEE Trans. Appl. Supercond.
    • Fourie, C.J.1    Perold, W.J.2    Gerber, H.R.3
  • 12
    • 0018707686 scopus 로고
    • The inductance of a superconducting strip transmission line
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    • W. H. Chang, "The inductance of a superconducting strip transmission line," J. Appl. Phys., vol. 50, pp. 8129-8134, Dec. 1979.
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  • 13
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    • Magnetic imaging of moat-guarded superconducting electronic circuits
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    • M. Jeffery, T. Van Duzer, J. R. Kirtley, and M. B. Ketchen, "Magnetic imaging of moat-guarded superconducting electronic circuits," Appl. Phys. Lett., vol. 67, pp. 1769-1771, Sep. 1995.
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    • Jeffery, M.1    Van Duzer, T.2    Kirtley, J.R.3    Ketchen, M.B.4
  • 14
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    • Numerical calculation of the inductances of a multi-superconductor transmission line system
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  • 15
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    • A single-clock asynchronous input COSL set-reset flip-flop and SFQ to voltage state interface
    • to be published
    • C. J. Fourie and W. J. Perold, "A single-clock asynchronous input COSL set-reset flip-flop and SFQ to voltage state interface," IEEE Trans. Appl. Supercond., to be published.
    • IEEE Trans. Appl. Supercond.
    • Fourie, C.J.1    Perold, W.J.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.