Error detection in majority logic decoding of euclidean geometry low density parity check (EG-LDPC) codes

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 21, Issue 1, 2013, Pages 156-159

  Reviriego, Pedro ^a   Maestro, Juan A ^a   Flanagan, Mark F ^b  

^a UNIVERSIDAD ANTONIO DE NEBRIJA   (Spain)

^b UNIVERSITY COLLEGE DUBLIN   (Ireland)

Author keywords

Error correction codes; Euclidean geometry low density parity check (EG LDPC) codes; majority logic decoding; memory

Indexed keywords

CODE SIZE; DIFFERENCE SETS; ERROR CORRECTION CODES; EUCLIDEAN GEOMETRY; EXTENSIVE SIMULATIONS; LOW DENSITY PARITY CHECK; LOW-DENSITY PARITY-CHECK (LDPC) CODES; MAJORITY LOGIC DECODING; MEMORY ACCESS TIME; MEMORY APPLICATIONS; PROBABILITY OF ERRORS;

DATA STORAGE EQUIPMENT; ITERATIVE DECODING; MAJORITY LOGIC;

ERROR DETECTION;

EID: 84871763051     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2011.2179681     Document Type: Article

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