Function inlining and loop unrolling for loop acceleration in reconfigurable processors

CASES'12 - Proceedings of the 2012 ACM International Conference on Compilers, Architectures and Synthesis for Embedded Systems, Co-located with ESWEEK

Volumn , Issue , 2012, Pages 101-109

  Miniskar, Narasinga Rao ^a   Gode, Pankaj Shailendra ^a   Kohli, Soma ^a   Yoo, Donghoon ^b  

^a Samsung Electronics India Software Operations Ltd   (India)

^b SAMSUNG Electronics   (South Korea)

Author keywords

Coarse grained reconfigurable arrays; Compilers; Optimizations; Performance analysis; VLIW

Indexed keywords

APPLICATION SOFTWARES; APPLICATION-SPECIFIC HARDWARE; DEBLOCKING FILTERS; DEVELOPMENT COSTS; EDGE FILTERS; H.264 STANDARDS; INLINING; JPEG DECODERS; JPEG ENCODERS; LOOP ACCELERATION; LOOP UNROLLING; PERFORMANCE ANALYSIS; PERFORMANCE IMPROVEMENTS; RECONFIGURABILITY; RECONFIGURABLE ARRAY; RECONFIGURABLE PROCESSORS; SAMSUNG; SAMSUNG ELECTRONICS; SOBEL FILTER; SOFTWARE SOLUTION; TIME-TO-MARKET; VLIW;

BENCHMARKING; CONSUMER ELECTRONICS; EMBEDDED SYSTEMS; ENERGY UTILIZATION; OPTIMIZATION; RECONFIGURABLE ARCHITECTURES; VERY LONG INSTRUCTION WORD ARCHITECTURE; VIDEO SIGNAL PROCESSING;

PROGRAM COMPILERS;

EID: 84869074747     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2380403.2380426     Document Type: Conference Paper

References (11)

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