On-chip jitter-spectrum-analyzer for high-speed digital designs

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 47, Issue , 2004, Pages

  Takamiya, Makoto ^a   Inohara, Hiroki ^a   Mizuno, Masayuki ^a  

^a NEC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG VOLTAGES; JITTER-SPECTRUM ANALYZERS (JSA); NOISE EFFECTS; POWER SUPPLY NETWORKS (PSN);

BANDWIDTH; ELECTRIC POWER SYSTEMS; FLIP FLOP CIRCUITS; FREQUENCY DOMAIN ANALYSIS; POWER SUPPLY CIRCUITS; SIGNAL ENCODING; SPECTRUM ANALYZERS; SPURIOUS SIGNAL NOISE; TIMING JITTER;

DIGITAL CIRCUITS;

EID: 84867700068     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. T. Rahal-Arabi et al., "Design and Validation of the Pentium III and Pentium 4 Processors Power Delivery," Dig. Symp. VLSI Circuits, pp. 220-223, June 2002.
2. A. Muhtaroglu et al., "On-Die Droop Detector for Analog Sensing of Power Supply Noise," Dig. Symp. VLSI Circuits, pp. 193-196, June 2003.
3. R. Kuppuswamy et al., "On-Die Clock Jitter Detector for High Speed Microprocessors," Dig. Symp. VLSI Circuits, pp. 187-191, June 2001.