Hybrid cache architecture replacing SRAM cache with future memory technology

ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2012, Pages 2481-2484

  Lee, Suji ^a   Jung, Jongpil ^a   Kyung, Chong Min ^a  

^a Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

CACHE ARCHITECTURE; FUTURE MEMORY; HETEROGENEOUS MEMORY; HIGH DENSITY; MEMORY ACCESS TIME; MEMORY STRUCTURE; POWER REDUCTIONS; PROCESSING SPEED;

DYNAMIC RANDOM ACCESS STORAGE; MAGNETIC STORAGE; MEMORY ARCHITECTURE; MRAM DEVICES; STATIC RANDOM ACCESS STORAGE;

CACHE MEMORY;

EID: 84866611037     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2012.6271803     Document Type: Conference Paper

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