Addressable current reference array with 170dB dynamic range

ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2012, Pages 3110-3113

  Yang, Minhao ^a   Liu, Shih Chii ^a   Li, Chenghan ^a   Delbruck, Tobi ^a  

^a UNIVERSITY OF ZURICH   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

BIASING VOLTAGES; CHIP AREAS; CMOS PROCESSS; CURRENT MIRRORS; CURRENT MULTIPLIERS; CURRENT REFERENCE; DYNAMIC RANGE; FINE RESOLUTION; INPUT CURRENT; LOW CURRENTS; MEASUREMENT RESULTS; MIXED SIGNAL; OFF-CURRENT; ROOM TEMPERATURE; SOURCE FOLLOWERS; SUPPRESSION TECHNIQUE; ULTRA-WIDE;

CMOS INTEGRATED CIRCUITS;

DESIGN;

EID: 84866598782     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2012.6271979     Document Type: Conference Paper

References (12)

1. P. Lichtsteiner, C. Posch, and T. Delbruck,"A 128×128 120dB 15?s latency asynchronous temporal contrast vision sensor," IEEE J. of Solid-State Circuits, vol. 43, pp. 566-576, 2008.
2. S.-C. Liu, A. van Schaik, B. A. Minch, and T. Delbruck,"Eventbased 64-channel binaural silicon cochlea with Q enhancement mechanisms," IEEE Int. Symposium on Circuits and Systems, pp. 2027-2030, 2010.
3. T. Delbruck, and A. van Schaik,"Bias current generators with wide dynamic range," Int. Journal of Analog Integrated Circuits and Signal Processing, vol. 43, pp. 247-268, 2005.
4. T. Delbruck, R. Berner, P. Lichtsteiner, and C. Dualibe,"32-bit configurable bias current generator with sub-off-current capability," IEEE Int. Symposium on Circuits and Systems, pp. 1647-1650, 2010.
5. E. Vittoz, and J. Fellrath,"CMOS analog circuits based on weak inversion operation," IEEE J. of Solid-State Circuits, vol. 12, pp. 224-231, 1977.
6. G. Bult, and G. Geelen,"An inherently linear and compact MOSTonly current division technique," IEEE J. of Solid State Circuits, vol. 27, pp. 1730-1735, 1992.
7. S. Guo, H. Lee, and P. Loizou,"A 9-Bit Configurable Current Source with Enhanced Output Resistance for Cochlear Stimulators," IEEE Custom Integrated Circuits Conference, pp. 511-514, 2008.
8. A. Hastings,"The art of analog layout," Prentice Hall, 2000.
9. C. Mead,"Analog VLSI and neural systems," Addison-Wesley, 1989.
10. B. Linares-Barranco, and T. Serrano-Gotarredona,"On the design and characterization of femtoampere current mode circuits," IEEE J. of Solid State Circuits, vol. 38, pp. 1353-1363, 2003.
11. R. Serrano-Gotarredona, L. Camuñas-Mesa, T. Serrano-Gotarredona, J. A. Leñero-Bardallo, and B. Linares-Barranco,"The stochastic IPot: A circuit block for programming bias currents," IEEE Trans. Circuits and Systems II, vol. 54, No. 9, pp 760-764, 2007.
12. jAER: Real time sensory-motor processing for spike based addressevent representation (AER) sensors and systems, Available: http://jaer. wiki. sourceforge. net, 2011.