Embedded nonvolatile memories: A key enabler for distributed intelligence

2012 4th IEEE International Memory Workshop, IMW 2012

Volumn , Issue , 2012, Pages

  Baker, Kelly ^a  

^a Freescale Semiconductor   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DISTRIBUTED INTELLIGENCE; EMBEDDED FLASH; FUTURE TRENDS; MARKET SEGMENT; NON-VOLATILE MEMORIES; ROBUST OPERATION; SOFTWARE-BASED; SPLIT GATES; TEMPERATURE RANGE;

MRAM DEVICES; OPTIMIZATION;

EMBEDDED SYSTEMS;

EID: 84864142403     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IMW.2012.6213637     Document Type: Conference Paper

References (15)

1. Source: IHS iSuppli, 4Q11 Application Market Forecast Tool.
2. A. Niebel, "Embedded Non Volatile Memory Markets on the Rise", Proc. IMW, 2011, pp. 15-17.
3. R. Strenz, "Embedded Flash Technologies and their Applications: Status and Outlook", Proc IEDM, 2011, pp. 211 214.
4. L. Parker, et al, "Advanced Flash Devices Embedded in 0.13um CMOS Process", Proc. NVSM Workshop, 2001, pp. 59-61.
5. D.W. Kang, et al, "The Effect of STI Process on the Cell Vth Distribution and Reliability of the 1Gigabit NAND Flash Memory", Proc. NVSM Workshop, 2004, pp 40-41.
6. F. Piazza, et al, "High performance Flash memory for 65nm embedded automotive application", Proc. IMW, 2010.
7. J. Yater, et al, "Highly Optimized Nanocrystal-based Split Gate Flash for High Performance and Low Power Microcontroller Applications", Proc IMW, 2011, pp 79-82.
8. L. Masoero, et al, "Scalability of split-gate charge trap memories down to 20nm for low power embedded memories", Proc. IEDM, 2011, pp 215-218.
9. G. Servalli, et al, "A 45nm Generation Phase Change Memory Technology", Proc. IEDM, 2009, pp 113-116.
10. B.N. Engel, et al, "A 4Mb Toggle MRAIVI Based on a Novel Bit and Switching Method", IEEE Transactions on Magnetics, Vol 41, No 1, January, 1995, pp 132-136.
11. B. Dieny,et el, "Extended scalability and functionalities of MRAM based on thermally assisted writing", Proc. IEDM, 2011, pp 11-14.
12. J.G. Zhu, "Magnetoresistive Random Access Memory: The Path to Competitiveness and Scalability", Proc. of the IEEE, Vol 96, Issue 11, Nov. 2008, pp 1786-1798.
13. Y.S. Chen, et al, "Highly Scalable Hafnium Oxide Memory with Improvements of Resistive Distribution and Read Disturb Immunity", Proc. IEDM, 2009, pp 105-108.
14. M. Kund,et al, "Conductive Bridge RAM (CBRAM): An emerging nonvolatile memory scalable to sub-20nm", Proc. IEDM, 2005, pp 754-757.
15. Maurelli, et al, "SoC and SiP, the Yin and Yang of the Tao for the New Electronic Era", Proc. of the IEEE, vol 97, No 1, Jan. 2009, pp 9-17.