A vertical-MOSFET-based digital core circuit for high-speed low-power vector matching

2011 International SoC Design Conference, ISOCC 2011

Volumn , Issue , 2011, Pages 203-206

  Ma, Yitao ^a   Endoh, Tetsuo ^a   Shibata, Tadashi ^b  

^a TOHOKU UNIVERSITY   (Japan)

^b UNIVERSITY OF TOKYO   (Japan)

Author keywords

High speed; Low Pwer; SIMD; Vector matcihng; Vertical MOSFET

Indexed keywords

DELAY CIRCUITS; INTEGRATED CIRCUIT MANUFACTURE; POWER MOSFET; TIMING CIRCUITS; VECTORS;

HIGH SPEED; LOW-PWER; SIMD; VECTOR MATCIHNG; VERTICAL MOSFETS;

LOW POWER ELECTRONICS;

EID: 84863124323     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/isocc.2011.6138745     Document Type: Conference Paper

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