A middle-1X nm NAND flash memory cell (M1X-NAND) with highly manufacturable integration technologies

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2011, Pages

  Hwang, Joowon ^a   Seo, Jihyun ^a   Lee, Youngbok ^a   Park, Sungkee ^a   Leem, Jongsoon ^a   Kim, Jaeseok ^a   Hong, Tackseung ^a   Jeong, Seokho ^a   Lee, Kyeongbock ^a   Heo, Hyeeun ^a   Lee, Heeyoul ^a   Jang, Philsoon ^a   Park, Kyounghwan ^a   Lee, Myungshik ^a   Baik, Seunghwan ^a   Kim, Jumsoo ^a   Kkang, Hyungoo ^a   Jang, Minsik ^a   Lee, Jaejung ^a   Cho, Gyuseog ^a   Lee, Juyeab ^a   Lee, Byungseok ^a   Jang, Heehyun ^a   Park, Sungkye ^a   Kim, Jinwoong ^a   Lee, Seokkiu ^a   Aritome, Seiichi ^a   Hong, Sungjoo ^a   Park, Sungwook ^a   more..

^a Hynix Semiconductor Inc   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

AIR-GAPS; ARF IMMERSION LITHOGRAPHY; CHARGE LOSS; DESIGN RULES; FLOATING GATES; INTEGRATION TECHNOLOGIES; JUNCTION FORMATION; MULTI-LEVEL; NAND FLASH MEMORY; PATTERNING TECHNOLOGY; WORDLINES;

DYNAMIC RANDOM ACCESS STORAGE; ELECTRON DEVICES; NAND CIRCUITS;

FLASH MEMORY;

EID: 84863046245     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2011.6131518     Document Type: Conference Paper

References (4)

1. K. Prall, et al., "25nm 64Gb MLC Technology and Scaling Challenge", IEEE IEDM Technical Digest, pp. 102-103, 2010.
2. C. Lee, et al., "A Highly Manufacturable Integration Technology for 27nm a and 3bit/cell NAND Flash Memory", IEEE IEDM Technical Digest, pp. 98-101, 2010.
3. H. Shim, et al., "Highly Reliable 26nm 64Gb MLC E2NAND (Embedded -ECC & Enhanced-efficiency Flash Memory with MSP (Memory Signal Processing) Controller", VLSI Symp. Technical Digest, pp. 216-217, 2011.
4. K. Lee, et al., "A Highly Manufacturable Integration Technology of 20nm Generation 64Gb Multi-Level NAND Flash Memory", VLSI Symp. Technical Digest, pp. 70-71, 2011.