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Volumn 2, Issue 1, 2012, Pages 82-95

A receiver architecture for devices in wireless body area networks

Author keywords

Body sensor networks; complementary metal oxide semiconductor (CMOS) integrated circuits; low power electronics; receivers; system on a chip

Indexed keywords

1/F NOISE; ANALOG DECODERS; ANALOG DOMAIN; ANALOG TO DIGITAL CONVERTERS; ANTENNA DESIGN; ANTENNA SIZE; BASE BANDS; COMPLEMENTARY METAL OXIDE SEMICONDUCTORS; COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR TECHNOLOGIES; DIGITAL BASEBAND; DIRECT CONVERSION RECEIVERS; FULLY INTEGRATED; ISM BANDS; LINK LOSS; LOW POWER; MEDIUM ACCESS; MODULATED SIGNAL; RADIO FREQUENCIES; RECEIVER ARCHITECTURE; SPURIOUS EMISSIONS; SYSTEM EVALUATION; SYSTEM-ON-A-CHIP; TIME OFFSETS; ULTRA-LOW POWER; WIRELESS BODY AREA NETWORK;

EID: 84862807198     PISSN: 21563357     EISSN: None     Source Type: Journal    
DOI: 10.1109/JETCAS.2012.2186681     Document Type: Article
Times cited : (32)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.