Weak inversion for ultimate low-power logic

Low-Power Electronics Design

Volumn , Issue , 2004, Pages 16-1-16-18

  Vittoz, Eric A ^a  

^a CSEM   (Switzerland)

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EID: 84889963793     PISSN: None     EISSN: None     Source Type: Book    
DOI: None     Document Type: Chapter

References (13)

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4. M. Miyazaki et al., A 175-mV multiply-accumulator unit using an adaptive supply and body bias (ASB) architecture, ISSCC Dig. of Tech. Papers, 2002, pp. 58, 59, 444.
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7. E. Vittoz, Low-power design: ways to approach the limits, ISSCC Dig. of Tech. Papers, 1994, pp. 14–18.
8. E. Vittoz, Very low power circuit design: fundamentals and limits, Proc. Int. Symp. on Circuits and Syst., 1993, vol. 2, pp. 1439–1442.
9. C. Enz, F. Krummenacher, and E. Vittoz, An analytical MOS transistor model valid in all regions of operation and dedicated to low-voltage and low-current applications, Analog Integrated Circuits and Signal Process., vol. 8, July 1995, pp. 83–114.
10. V. von Kaenel et al., Automatic adjustment of threshold and supply voltage for minimum power consumption in CMOS digital circuits, Proc. IEEE Symp. on Low-Power Electron., San Diego, CA, 1994, pp. 78–79.
11. J.R. Burns, Switching response of complementary-symmetry MOS transistor logic circuits, RCA Review, Dec. 1964, pp. 627–661.
12. H.J.M. Veendrick, Short-circuit dissipation of static CMOS circuitry and its impact on the design of buffer circuits, IEEE J. Solid-State Circuits, vol. SC-19, August 1984, pp. 468–473.
13. A.P. Chandrakasan and R.W. Brodersen, Minimizing power consumption in digital CMOS circuits, IEEE Proc., vol. 83, April 1995, pp. 498–523.