Evaluating the generalisation capability of a CMOS based synapse

Neurocomputing

Volumn 83, Issue , 2012, Pages 188-197

  Ghani, A ^a,b   McDaid, L ^b   Belatreche, A ^b   Hall, S ^c   Huang, S ^c   Marsland, J ^c   Dowrick, T ^c   Smith, A ^c  

^a NEWCASTLE UNIVERSITY   (United Kingdom)

^b UNIVERSITY OF ULSTER   (United Kingdom)

^c UNIVERSITY OF LIVERPOOL   (United Kingdom)

Author keywords

CMOS implementation of spiking neurons; CMOS synapses; Spiking neural networks

Indexed keywords

BENCH-MARK PROBLEMS; CMOS SYNAPSES; CONVERGENCE TIME; EMPIRICAL MODEL; GENERALISATION; HARDWARE SIMULATION; NEURAL NETWORK TOOLBOXES; PERFORMANCE METRICES; SPIKE RESPONSE MODELS; SPIKING NEURAL NETWORKS; SPIKING NEURON; SYNAPTIC RESPONSE; TRAINING ALGORITHMS; WEIGHT RANGE;

BENCHMARKING; DYNAMIC RESPONSE; NEURAL NETWORKS;

MATLAB;

ACCURACY; ALGORITHM; ARTICLE; ARTIFICIAL MEMBRANE; ARTIFICIAL NEURAL NETWORK; CHARGE TRANSFER SYNAPSE; CONTROLLED STUDY; DYNAMICS; EVOLUTIONARY STRATEGY; GENERALIZATION CAPABILITY; MACHINE LEARNING; NONBIOLOGICAL MODEL; POSTSYNAPTIC POTENTIAL WAVEFORM; PRIORITY JOURNAL; QUALITY CONTROL; SIMULATION; SPIKE RESPONSE MODEL; SPIKING NEURAL NETWORK; TRAINING DYNAMICS; WAVEFORM; WEIGHT; WEIGHT RANGE;

EID: 84862782045     PISSN: 09252312     EISSN: 18728286     Source Type: Journal    
DOI: 10.1016/j.neucom.2011.12.010     Document Type: Article

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