Customizing a VLIW chip multiprocessor for motion estimation algorithms

24th International Conference on Architecture of Computing Systems 2011, ARCS 2011 - Workshop Proceedings

Volumn , Issue , 2011, Pages 178-184

  Chouliaras, V ^a   Lentaris, G ^b   Reisis, D ^b   Stevens, D ^a  

^a LOUGHBOROUGH UNIVERSITY   (United Kingdom)

^b UNIVERSITY OF ATHENS   (Greece)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL EFFICIENCY; MEMORY ARCHITECTURE; MOTION ESTIMATION; MULTIPROCESSING SYSTEMS; PIPELINES; VIDEO SIGNAL PROCESSING;

CHIP MULTIPROCESSOR; CHIP MULTIPROCESSORS; CUSTOM INSTRUCTION; FPGA IMPLEMENTATIONS; INSTRUCTION SET ARCHITECTURE; MICRO ARCHITECTURES; MOTION ESTIMATION ALGORITHM; THREE-STEP SEARCH;

VERY LONG INSTRUCTION WORD ARCHITECTURE;

EID: 84861757693     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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