Customized on-chip memories for embedded chip multiprocessors

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn 2, Issue , 2005, Pages 743-748

  Ozturk, O ^a   Kandemir, M ^a   Chen, G ^a   Irwin, M J ^a   Karakoy, M ^b  

^a The Pennsylvania State University   (United States)

^b IMPERIAL COLLEGE LONDON   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; ELECTRIC POWER UTILIZATION; MULTIPROCESSING SYSTEMS;

APPLICATION SPECIFIC; CHIP MULTIPROCESSOR; CODE OPTIMIZATION; CRITICAL PROBLEMS; LOWER-POWER CONSUMPTION; MEMORY COMPONENT; MEMORY CONFIGURATION; PARALLEL PROCESSOR;

MEMORY ARCHITECTURE;

EID: 84861440128     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1120725.1121008     Document Type: Conference Paper

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