A dynamic reconfigurable RF circuit architecture

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn 2, Issue , 2005, Pages 683-686

  Okada, Kenichi ^a   Yoshihara, Yoshiaki ^a   Sugawara, Hirotaka ^a   Masu, Kazuya ^a  

^a TOKYO INSTITUTE OF TECHNOLOGY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; DYNAMIC MODELS; ELECTRIC NETWORK ANALYSIS; MEMORY ARCHITECTURE; RECONFIGURABLE ARCHITECTURES; SOFTWARE RADIO; TIMING CIRCUITS;

CONTROL CIRCUITS; DYNAMIC CHANGES; DYNAMIC RE-CONFIGURATION; DYNAMIC RECONFIGURABLE ARCHITECTURE; PROCESS VARIATION; PROPOSED ARCHITECTURES; RECONFIGURABLE RF CIRCUITS; SOFTWARE-DEFINED RADIOS;

RECONFIGURABLE HARDWARE;

EID: 84861421711     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1120725.1120993     Document Type: Conference Paper

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