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Volumn 2, Issue , 2005, Pages 990-993

Deriving a new efficient algorithm for min-period retiming

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; FORMAL METHODS; HEURISTIC ALGORITHMS;

EID: 84861418671     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1120725.1120774     Document Type: Conference Paper
Times cited : (14)

References (14)
  • 1
    • 0036907030 scopus 로고    scopus 로고
    • Concurrent flip-flop and repeater insertion for high performance integrated circuits
    • P. Cocchitii. Concurrent flip-flop and repeater insertion for high performance integrated circuits. In ICCAD, pages 268273, 2002.
    • (2002) ICCAD , pp. 268-273
    • Cocchitii, P.1
  • 3
    • 0016543936 scopus 로고
    • Guarded commands, nondeterminacy, and the formal derivation of programs
    • E. W. Dijkstra. Guarded commands, nondeterminacy, and the formal derivation of programs. CACM, 8:453-457, 1975.
    • (1975) CACM , vol.8 , pp. 453-457
    • Dijkstra, E.W.1
  • 8
    • 0036915663 scopus 로고    scopus 로고
    • Optimal path routing in single and multiple clock domain systems
    • S. Hassoun and C. J. Alpert. Optimal path routing in single and multiple clock domain systems. In ICCAD, pages 247253, 2002.
    • (2002) ICCAD , pp. 247-253
    • Hassoun, S.1    Alpert, C.J.2
  • 9
    • 84945708698 scopus 로고
    • An axiomatic basis for computing programming
    • October
    • C. A. R. Hoare. An axiomatic basis for computing programming. Communications of the ACM, 12(10):576-580, October 1969.
    • (1969) Communications of the ACM , vol.12 , Issue.10 , pp. 576-580
    • Hoare, C.A.R.1
  • 10
    • 0030704430 scopus 로고    scopus 로고
    • Optimizing two-phase, level-clocked circuitry
    • January
    • Alexander T. Ishii, Charles E. Leiserson, and Marios C. Pa paefthymiou. Optimizing two-phase, level-clocked circuitry. ,IACM, 44(1):148-199, January 1997.
    • (1997) IACM , vol.44 , Issue.1 , pp. 148-199
    • Ishii, A.T.1    Leiserson, C.E.2    Papaefthymiou, M.C.3
  • 12
    • 33746763910 scopus 로고
    • Retiming synchronous circuitry
    • C. E. Leiserson and J. B. Saxe. Retiming synchronous circuitry. Algorithmica, 6(l):5-35, 1991.
    • (1991) Algorithmica , vol.6 , Issue.1 , pp. 5-35
    • Leiserson, C.E.1    Saxe, J.B.2
  • 13
    • 0030260869 scopus 로고    scopus 로고
    • Utilizing the retiming-skew equivalence in a practical algorithm for retiming large circuits
    • October
    • S. S. Sapatnekar and R. B Deokar. Utilizing the retiming-skew equivalence in a practical algorithm for retiming large circuits. IEEE TCAD, 15(10):1237-1248, October 1996.
    • (1996) IEEE TCAD , vol.15 , Issue.10 , pp. 1237-1248
    • Sapatnekar, S.S.1    Deokar, R.B.2
  • 14
    • 4444289167 scopus 로고    scopus 로고
    • Retiming for wire pipelining in system-on-chip
    • September
    • H. Zhou and C. Lin. Retiming for wire pipelining in system-on-chip. IEEE TCAD, 23(9):1338-1345, September 2004.
    • (2004) IEEE TCAD , vol.23 , Issue.9 , pp. 1338-1345
    • Zhou, H.1    Lin, C.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.