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Volumn , Issue , 2011, Pages 329-332

Development of thermal compression bonding with non conductive paste for 3DIC fine pitch copper pillar bump interconnections

Author keywords

[No Author keywords available]

Indexed keywords

COPPER PILLARS; DIE AREA; DIE SIZE; ELECTRICAL PERFORMANCE; FINE PITCH; GEL TIME; HIGH-DENSITY INTERCONNECTION; INTEGRATED CIRCUIT INDUSTRIES; KEY TECHNOLOGIES; MELTING TIME; MICRO-BUMPS; NON CONDUCTIVE PASTES; PROCESS PARAMETERS; RELIABILITY TEST; SOLDER BUMP; TEST VEHICLE; THERMAL COMPRESSION BONDING; UNDERFILLING; UNDERFILLS; WIDTH CONTROL;

EID: 84860913915     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EPTC.2011.6184439     Document Type: Conference Paper
Times cited : (13)

References (6)
  • 4
    • 24144464809 scopus 로고    scopus 로고
    • Process Optimization to Overcome Void Formation in Nonconductive Paste Interconnections for Fine-Pitch Applications
    • S.C. Tan, Y.C. Chan and Nelson S.M. Lui, "Process Optimization to Overcome Void Formation in Nonconductive Paste Interconnections for Fine-Pitch Applications," Journal of Electronic Materials, Vol. 34, No. 8 (2005), pp. 1143-1149.
    • (2005) Journal of Electronic Materials , vol.34 , Issue.8 , pp. 1143-1149
    • Tan, S.C.1    Chan, Y.C.2    Lui, N.S.M.3
  • 5
    • 4444305289 scopus 로고    scopus 로고
    • Effects of Silica Filler and Diluent on Material Properties and Reliability of Nonconductive Pastes (NCPs) for Flip-Chip Applications
    • Kyung-Woon Jang, Woon-Seong Kwon, Myung-Jin Yim and Kyung-Wook Paik, "Effects of Silica Filler and Diluent on Material Properties and Reliability of Nonconductive Pastes (NCPs) for Flip-Chip Applications,"IEEE Transations on Components and Packaging Technologies, Vol. 27, No. 3 (2004), pp. 608-615.
    • (2004) IEEE Transations on Components and Packaging Technologies , vol.27 , Issue.3 , pp. 608-615
    • Jang, K.-W.1    Kwon, W.-S.2    Yim, M.-J.3    Paik, K.-W.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.