Kriging-assisted ultra-fast simulated-annealing optimization of a clamped bitline sense amplifier

Proceedings of the IEEE International Conference on VLSI Design

Volumn , Issue , 2012, Pages 310-315

  Okobiah, Oghenekarho ^a   Mohanty, Saraju P ^a   Kougianos, Elias ^a   Garitselov, Oleg ^a  

^a UNIVERSITY OF NORTH TEXAS   (United States)

Author keywords

DRAM; Fast design optimization; Kriging methods; Metamodeling; Sense amplifier; Simulated annealing

Indexed keywords

ACCURATE DESIGN; AVERAGE EXECUTION TIME; BIT LINES; CIRCUIT PARAMETER; DESIGN OPTIMIZATION; DESIGN SPACES; EXHAUSTIVE SEARCH; KRIGING; KRIGING METAMODELS; KRIGING METHODS; LARGE CIRCUITS; META MODEL; METAMODELING; NANO CMOS; OPTIMIZATION ALGORITHMS; PRE-CHARGE; PROCESS PARAMETERS; PROCESS VARIATION; REGRESSION MODEL; SENSE AMPLIFIER; SIMULATED ANNEALING ALGORITHMS; STRONG CORRELATION EFFECT; TECHNOLOGY SCALING; ULTRA-FAST;

ALGORITHMS; DESIGN; DYNAMIC RANDOM ACCESS STORAGE; EMBEDDED SYSTEMS; INTERPOLATION; MATHEMATICAL MODELS; REGRESSION ANALYSIS; SPICE;

SIMULATED ANNEALING;

EID: 84859894425     PISSN: 10639667     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSID.2012.89     Document Type: Conference Paper

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