Source-gated transistors for versatile large area electronic circuit design and fabrication

ECS Transactions

Volumn 37, Issue 1, 2011, Pages 57-63

  Sporea, R A ^a   Guo, X ^b   Shannon, J M ^a   Silva, S R P ^a  

^a UNIVERSITY OF SURREY   (United Kingdom)

^b SHANGHAI JIAO TONG UNIVERSITY   (China)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUIT MANUFACTURE; REMOTE SENSING; SEMICONDUCTOR DEVICE MANUFACTURE; SIGNAL PROCESSING; THIN FILM TRANSISTORS; THIN FILMS; TIMING CIRCUITS; ULSI CIRCUITS;

BLOCKING CONTACTS; LARGE-AREA ELECTRONICS; OUTPUT CONDUCTANCE; PATTERNING TECHNIQUES; POTENTIAL BARRIERS; SATURATION REGIME; SATURATION VOLTAGE; SOURCE GATED TRANSISTORS;

THIN FILM CIRCUITS;

EID: 84856888502     PISSN: 19385862     EISSN: 19386737     Source Type: Conference Proceeding    
DOI: 10.1149/1.3600724     Document Type: Conference Paper

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