Implementation of chaotic circuits with a digital time-delay block

Nonlinear Dynamics

Volumn 67, Issue 1, 2012, Pages 345-355

  Pham, Viet Thanh ^a   Fortuna, Luigi ^a   Frasca, Mattia ^a  

^a UNIVERSITY OF CATANIA   (Italy)

Author keywords

Chaos; Chaotic synchronization; Time delay circuit

Indexed keywords

CHAOTIC CIRCUITS; CHAOTIC SYNCHRONIZATION; CONVERSION PROCESS; DIGITAL CIRCUITRY; PROGRAMMABLE HARDWARE; SAMPLING RATES; SYNCHRONIZATION ERROR; TIME-DELAY CIRCUIT;

CHAOS THEORY; CHAOTIC SYSTEMS; DIGITAL CIRCUITS; TIME DELAY;

DELAY CIRCUITS;

EID: 82255194023     PISSN: 0924090X     EISSN: None     Source Type: Journal    
DOI: 10.1007/s11071-011-9982-9     Document Type: Article

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