Time-multiplexing of signal using highly integrated digital delay: An FPGA implementation

IEEE Nuclear Science Symposium Conference Record

Volumn 1, Issue , 2005, Pages 398-402

  Bocci, V ^a   Chiodi, G ^a   Iacoangeli, F ^a   Nobrega, R ^a   Pinci, D ^a   Rinaldi, W ^a  

^a INFN SEZIONE DI ROMA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED DIGITAL DELAY; INTEGRATED TIME MULTIPLEXING DEVICES; MULTIPLE FIXED DELAYS; XILINX SPARTANIIE FPGA;

DELAY CIRCUITS; INTEGRATED CIRCUITS; MULTIPLEXING; READOUT SYSTEMS; SIGNAL PROCESSING;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 33846640030     PISSN: 10957863     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/NSSMIC.2005.1596279     Document Type: Conference Paper

References (4)

1. F.Iacoangeli, V.Bocci (Advisor),G.Martellotti (Advisor) "Studio del sistema di test e controllo delle camere per i muoni dell'esperimento LHCb",M.S.C. thesis , Rome - university "La Sapienza" (2003)
2. Xilinx,"SpartanIIE 1.8V FPGA Family Complete Data Sheet", http://direct.xilinx.com/bvdocs/publications/ds077.pdf
3. V.Bocci et al. "Multiplexed Channel Readout in a Cosmic Rays Test Station", Proceeding of 11th Workshop on Electronics for LHC and future Experiments, LECC 2005, Heidelberg, Germany
4. V. Bocci, et al "Performance Evaluation of the Control System for the LHCb Muon Detector", Proceeding of 11th Workshop on Electronics for LHC and future Experiments, LECC 2005, Heidelberg, Germany