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Volumn , Issue , 2009, Pages 308-314

Modeling and Simulation of a High-Temperature SiC JFET/JBS Power Electronics Building Block

Author keywords

Power Electronics Building Block (PEBB); SiC JFET

Indexed keywords

CAPACITANCE; CIRCUIT SIMULATION; COMPUTER AIDED ANALYSIS; HIGH TEMPERATURE APPLICATIONS; JUNCTION GATE FIELD EFFECT TRANSISTORS; POWER ELECTRONICS;

EID: 81855190320     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (2)

References (11)
  • 1
    • 65949100801 scopus 로고    scopus 로고
    • SiC Wirebond Multi-chip Phase-Leg Module Packaging Design and Testing for Harsh Environment
    • Feb
    • P. Ning, R. Lai, D. Huff, F. Wang, and K. Ngo, “SiC Wirebond Multi-chip Phase-Leg Module Packaging Design and Testing for Harsh Environment,” in Proc. APEC 2009, Feb. 2009, pp. 631-636.
    • (2009) Proc. APEC 2009 , pp. 631-636
    • Ning, P.1    Lai, R.2    Huff, D.3    Wang, F.4    Ngo, K.5
  • 3
    • 51049117894 scopus 로고    scopus 로고
    • High Temperature Characterization of SiC JFET and Modeling
    • Sept
    • R. Mousa, D. Planson, H. Morel, C. Raynaud, “High Temperature Characterization of SiC JFET and Modeling,” in Proc. EPE 2007, Sept. 2007, pp. 1-10.
    • (2007) Proc. EPE 2007 , pp. 1-10
    • Mousa, R.1    Planson, D.2    Morel, H.3    Raynaud, C.4
  • 6
    • 84871383744 scopus 로고    scopus 로고
    • ver. Y-2006.06-SP2, Synopsys Inc., Mountain View, CA
    • “Synopsys Saber”, ver. Y-2006.06-SP2, Synopsys Inc., Mountain View, CA.
    • Synopsys Saber
  • 7
    • 33745891203 scopus 로고    scopus 로고
    • A SiC JFET Driver for a 5 kW, 150 kHz Three-Phase PWM Converter
    • Oct
    • S. Round, M. Heldwein, J. Kolar, I. Hofsajer, P. Friedrichs, “A SiC JFET Driver for a 5 kW, 150 kHz Three-Phase PWM Converter,” in Proc. IAS 2005, vol. 1, pp. 410-416, Oct. 2005.
    • (2005) Proc. IAS 2005 , vol.1 , pp. 410-416
    • Round, S.1    Heldwein, M.2    Kolar, J.3    Hofsajer, I.4    Friedrichs, P.5
  • 9
    • 85184828663 scopus 로고    scopus 로고
    • Design consideration of a fast 0-Ohm gate resistance gate-drive circuit for 1.2 kV SiC JFET devices in phase-leg configuration
    • to be presented in Sept
    • R. Burgos, Z. Chen, C. Cass, F. Wang, and D. Boroyevich, “Design consideration of a fast 0-Ohm gate resistance gate-drive circuit for 1.2 kV SiC JFET devices in phase-leg configuration,” to be presented in IEEE ECCE 2009, Sept. 2009.
    • (2009) IEEE ECCE 2009
    • Burgos, R.1    Chen, Z.2    Cass, C.3    Wang, F.4    Boroyevich, D.5
  • 10
    • 84871394271 scopus 로고    scopus 로고
    • ver. 8, Ansoft Corporate, Pittsburg, PA
    • “Ansoft Quick 3D Extractor”, ver. 8, Ansoft Corporate, Pittsburg, PA.
    • Ansoft Quick 3D Extractor
  • 11


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.