Optical diagnosis of excess IDDQ in low power CMOS circuits

Microelectronics Reliability

Volumn 42, Issue 9-11, 2002, Pages 1689-1694

  Stellari, Franco ^a   Song, Peilin ^a   Tsang, James C ^a   McManus, Moyra K ^a   Ketchen, Mark B ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; DEFECTS; ELECTRIC NETWORK ANALYSIS; LUMINESCENCE; TIMING CIRCUITS;

DIRECT MEASUREMENT; HIGH POWER CONSUMPTION; LOW-POWER CMOS CIRCUITS; LUMINESCENCE EMISSION; OPTICAL DIAGNOSIS; OPTICAL INSPECTION; PICOSECOND IMAGING CIRCUIT ANALYSIS; UNIFORM EMISSION;

LOW POWER ELECTRONICS;

EID: 80054904308     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0026-2714(02)00213-5     Document Type: Conference Paper

References (5)

1. ddq testing: a review", J. Electron. Testing: theory and Applications, vol. 3, 1992, pp. 291-303. (Pubitemid 23599248)
2. W.R. Daasch, J. McNames, D. Bockelman, K. Cota and R. Madge, "Variance reduction using wafer patterns in IDDQ data", International Test Conference, 2000, pp. 189-198. (Pubitemid 32134664)
3. J.A. Kash, J.C. Tsang, R.F. Rizzolo, A.K. Patel, A.D. Shore "Backside Optical Emission Diagnostics for Excess IDDQ", IEEE J. of Solid-State Circuits, vol. 33, no. 3, 1998, pp. 508-511. (Pubitemid 128573471)
4. N.H.E. Weste and K. Eshraghian, "Principles of CMOS VLSI Design", Addis on-Wesley, 2nd Edition, 1993, pp. 465-508.
5. S. Polonsky et al., "Non-invasive timing analysis of IBM G6 microprocessor LI cache using backside time-resolved hot electron luminescence", International Solid-State Circuits Conference, 2000, p. 222.