Ultra compact non-volatile flip-flop for low power digital circuits based on hybrid CMOS/magnetic technology

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 6951 LNCS, Issue , 2011, Pages 83-91

  Di Pendina, Gregory ^a   Torki, Kholdoun ^a   Prenat, Guillaume ^b   Guillemenet, Yoann ^c   Torres, Lionel ^c  

^a CMP Service   (France)

^b CEA GRENOBLE   (France)

^c LIRMM   (France)

Author keywords

Digital Design; Flip Flop; Full Custom Design; Latch; Low Power; Magnetic Tunnel Junction; Non volatile; Process Design Kit; Standard Cell

Indexed keywords

CUSTOM DESIGN; DIGITAL DESIGNS; FLIP-FLOP; LATCH; LOW POWER; MAGNETIC TUNNEL JUNCTION; NON-VOLATILE; PROCESS DESIGN KIT; STANDARD CELL;

DIGITAL DEVICES; DIGITAL INTEGRATED CIRCUITS; ELECTRIC BATTERIES; FLIP FLOP CIRCUITS; INTEGRATION; LOGIC CIRCUITS; LOGIC DESIGN; LOW POWER ELECTRONICS; MAGNETIC DEVICES; MAGNETISM; OPTIMIZATION; PROCESS DESIGN; STANDARDS; SYSTEMS ANALYSIS; TIMING CIRCUITS; TUNNEL JUNCTIONS;

CMOS INTEGRATED CIRCUITS;

EID: 80053479603     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-642-24154-3_9     Document Type: Conference Paper

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