A bottom-up approach for System-On-Chip reliability

Microelectronics Reliability

Volumn 51, Issue 9-11, 2011, Pages 1425-1439

  Huard, V ^a   Ruiz, N ^a   Cacho, F ^a   Pion, E ^a  

^a STMICROELECTRONICS   (France)

Author keywords

[No Author keywords available]

Indexed keywords

BOTTOM UP APPROACH; DIGITAL SYSTEM; SYSTEM LEVELS; SYSTEM ON CHIPS;

APPLICATION SPECIFIC INTEGRATED CIRCUITS;

MICROPROCESSOR CHIPS;

EID: 80052930473     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.microrel.2011.07.086     Document Type: Conference Paper

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