Cache games - Bringing access-based cache attacks on AES to practice

Proceedings - IEEE Symposium on Security and Privacy

Volumn , Issue , 2011, Pages 490-505

  Gullasch, David ^a   Bangerter, Endre ^a   Krenn, Stephan ^a  

^a BERN UNIVERSITY OF APPLIED SCIENCES   (Switzerland)

Author keywords

Access based cache attacks; AES; Side channel

Indexed keywords

CACHE MEMORY; DENIAL-OF-SERVICE ATTACK; LINUX; RECOVERY;

ACCESS DRIVEN; ACCESS-BASED CACHE ATTACK; AES; CACHE ATTACK; CRYPTOGRAPHIC SYSTEMS; LINUX SYSTEMS; MEMORY LOCATIONS; PLAINTEXT; SIDE-CHANNEL; SIDE-CHANNEL ATTACKS;

SIDE CHANNEL ATTACK;

EID: 80051974249     PISSN: 10816011     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SP.2011.22     Document Type: Conference Paper

References (42)

1. J.-F. Gallais, I. Kizhvatov, and M. Tunstall, "Improved trace-driven cache-collision attacks against embedded AES implementations," in WISA '10, ser. LNCS, Y. Chung and M. Yung, Eds., vol. 6513. Springer, 2010, pp. 243-257.
2. Y. Tsunoo, T. Saito, T. Suzaki, M. Shigeri, and H. Miyauchi, "Cryptanalysis of DES implemented on computers with cache," in CHES '03, ser. LNCS, C. D. Walter, Ç. Koç, and C. Paar, Eds., vol. 2779. Springer, 2003, pp. 62-76.
3. B. Brumley and R. Hakala, "Cache-timing template attacks," in ASIACRYPT '09, ser. LNCS, S. Halevi, Ed., vol. 5677. Springer, 2009, pp. 667-684.
4. C. Percival, "Cache missing for fun and profit," http://www.daemonology.net/hyperthreading-considered-harmful/, 2005.
5. O. Aciiçmez, B. Brumley, and P. Grabher, "New results on instruction cache attacks," in CHES 2010, ser. LNCS, S. Mangard and F.-X. Standaert, Eds., vol. 6225. Springer, 2010, pp. 110-124.
6. M. Neve and J.-P. Seifert, "Advances on access-driven cache attacks on AES," in SAC '06, ser. LNCS, E. Biham and A. M. Youssef, Eds., vol. 4356. Springer, 2006, pp. 147-162.
7. E. Tromer, D. A. Osvik, and A. Shamir, "Efficient cache attacks on AES, and countermeasures," Journal of Cryptology, vol. 23, no. 1, pp. 37-71, 2010.
8. D. A. Osvik, A. Shamir, and E. Tromer, "Cache attacks and countermeasures: The case of AES," in CT-RSA '06, ser. LNCS, D. Pointcheval, Ed., vol. 3860. Springer, 2006, pp. 1-20. (Pubitemid 43971699)
9. O. Aciiçmez, W. Schindler, and Ç. Koç, "Cache based remote timing attack on the AES," in CT-RSA '07, ser. LNCS, M. Abe, Ed., vol. 4377. Springer, 2007, pp. 271-286.
10. D. J. Bernstein, "Cache-timing attacks on AES," http://cr.yp.to/papers.html, 2004, University of Illinois, Chicago, US.
11. M. Neve, J.-P. Seifert, and Z. Wang, "A refined look at Bernstein's AES side-channel analysis," in ASIACCS '06, F.-C. Lin, D.-T. Lee, B.-S. Lin, S. Shieh, and S. Jajodia, Eds. ACM, 2006, p. 369. (Pubitemid 46644766)
12. J. Bonneau and I. Mironov, "Cache-collision timing attacks against AES," in CHES '06, ser. LNCS, L. Goubin and M. Matsui, Eds., vol. 4249. Springe, 2006, pp. 201-215. (Pubitemid 44710731)
13. O. Aciiçmez and Ç. Koç, "Trace-driven cache attacks on AES," Cryptology ePrint Archive, Report 2006/138, 2006.
14. X. Zhao and T. Wang, "Improved cache trace attack on AES and CLEFIA by considering cache miss and S-box misalignment," Cryptology ePrint Archive, Report 2010/056, 2010.
15. G. Bertoni, V. Zaccaria, L. Breveglieri, M. Monchiero, and G. Palermo, "AES power attack based on induced cache miss and countermeasure," in ITCC '05. IEEE Computer Society, 2005, pp. 586-591. (Pubitemid 41290159)
16. C. Lauradoux, "Collision attacks on processors with cache and countermeasures," in WEWoRC '05, ser. LNI, C. Wolf, S. Lucks, and P.-W. Yau, Eds., vol. 74. GI, 2005, pp. 76-85.
17. J. Daemen and V. Rijmen, "AES proposal: Rijndael," AES Algorithm Submission, 1999.
18. FIPS, Advanced Encryption Standard (AES). National Institute of Standards and Technology, 2001, http://csrc.nist.gov/publications/fips/. Federal Information Processing Standard 197.
19. OpenSSL, "OpenSSL: The Open Source toolkit for SSL/TSL," http://www.openssl.org/, 1998-2010.
20. P. Kocher, "Timing attacks on implementations of Diffie-Hellman, RSA, DSS, and other systems," in CRYPTO '96, ser. LNCS, N. Koblitz, Ed., vol. 1109. Springer, 1996, pp. 104-113. (Pubitemid 126106234)
21. J. Kelsey, B. Schneier, D. Wagner, and C. Hall, "Side channel cryptanalysis of product ciphers," Journal of Computer Security, vol. 8, no. 2/3, pp. 141-158, 2000.
22. D. Page, "Theoretical use of cache memory as a cryptanalytic side-channel," Department of Computer Science, University of Bristol, Tech. Rep. CSTR-02-003, June 2002.
23. -, "Defending against cache based side-channel attacks," Information Security Technical Report, vol. 8, no. 1, pp. 30-44, April 2003.
24. K. Tiri, O. Aciiçmez, M. Neve, and F. Andersen, "An analytical model for time-driven cache attacks," in FSE '07, ser. LNCS, A. Biryukov, Ed., vol. 4593. Springer, 2007, pp. 399-413.
25. E. Brickell, G. Graunke, M. Neve, and J.-P. Seifert, "Software mitigations to hedge AES against cache-based software side channel vulnerabilities," Cryptology ePrint Archive, Report 2006/052, 2006.
26. S. Gueron, "Advanced Encryption Standard (AES) instructions set," www.intel.com/Assets/PDF/manual/323641.pdf, 2008, Intel Corporation.
27. R. Könighofer, "A fast and cache-timing resistant implementation of the AES," in CT-RSA '08, ser. LNCS, T. Malkin, Ed., vol. 4964. Springer, 2008, pp. 187-202. (Pubitemid 351641984)
28. "Intel 64 and IA-32 architectures optimization reference manual," http://www.intel.com/Assets/PDF/manual/248966.pdf, 2010, Intel Corporation.
29. "Intel 64 and IA-32 architectures software developer's manual. Volume 3A: System Programming Guide, Part 1," http://www.intel.com/Assets/ PDF/manual/253668.pdf, 2010, Intel Corporation.
30. J. Daemen and V. Rijmen, The Design of Rijndael: AES - The Advanced Encryption Standard. Springer, 2002.
31. V. Rijmen, A. Bosselaers, and P. Barreto, "Optimised ANSI C code for the Rijndael cipher," http://fastcrypto.org/front/misc/rijndael-alg-fst.c, 2000.
32. M. Bayes, "An essay towards solving a problem in the doctrine of chances," Philosophical Transactions, vol. 53, pp. 370-418, 1763.
33. J. Bernardo and A. Smith, Bayesian Theory. Wiley, 1994.
34. I. Molnár, "Design of the CFS scheduler," http://people.redhat.com/mingo/cfs-scheduler/sched-design-CFS.txt, 2007, Redhat.
35. D. Tsafrir, Y. Etsion, and D. Feitelson, "Secretly monopolizing the cpu without superuser privileges," in USENIX Security '07. USENIX, 2007, pp. 1-18.
36. M. Jordan and C. Bishop, "Neural networks," ACM Computing Surveys, vol. 28, no. 1, pp. 73-75, 1996. (Pubitemid 126499029)
37. W. McCulloch and W. Pitts, "A logical calculus of the ideas immanent in nervous activity," Bulletin of Mathematical Biophysics, vol. 5, no. 4, pp. 115-113, 1943.
38. C. Bishop, Neural Networks for Pattern Recognition. Oxford University Press, 1996.
39. P. Simard, D. Steinkraus, and J. Platt, "Best practices for convolutional neural networks applied to visual document analysis," in ICDAR '03. IEEE Computer Society, 2003, pp. 958-962.
40. P. Ghewari, J. Patil, and A. Chougule, "Efficient hardware design and implementation of AES cryptosystem," International Journal of Engineering Science and Technology, vol. 2, no. 3, pp. 213-219, 2010.
41. M. Mali, F. Novak, and A. Biasizzo, "Hardware implementation of AES algorithm," Journal of Electrical Engineering, vol. 56, no. 9-10, pp. 265-269, 2005.
42. T. Ristenpart, E. Tromer, H. Shacham, and S. Savage, "Hey, you, get off of my cloud! Exploring information leakage in third-party compute clouds," in CCS '09, S. Jha and A. Keromytis, Eds. ACM Press, 2009, pp. 199-212.