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Volumn 4964 LNCS, Issue , 2008, Pages 187-202

A fast and cache-timing resistant implementation of the AES

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER STORAGE; COMPUTER ARCHITECTURE; COMPUTER CRIME; OPTIMIZATION; PROGRAM PROCESSORS;

EID: 43149087564     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-79263-5_12     Document Type: Conference Paper
Times cited : (56)

References (12)
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    • Biham, E.: A fast new DES implementation in software. In: Biham, E. (ed.) FSE 1997. LNCS, vol. 1267. pp. 260-272. Springer. Heidelberg (1997)
  • 2
    • 43149113578 scopus 로고    scopus 로고
    • Bernstein, D.J.: Cache-timing attacks on AES (April 2005), Revised version of earlier 2004-11 version, http://cr.yp.to/antiforgery/cachetiming- 20050414.pdf
    • Bernstein, D.J.: Cache-timing attacks on AES (April 2005), Revised version of earlier 2004-11 version, http://cr.yp.to/antiforgery/cachetiming- 20050414.pdf
  • 3
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    • Software mitigations to hedge AES against cache-based software side channel vulnerabilities. Cryptology ePrint Archive
    • Report 2006/052
    • Brickell, E., Graunke, G., Neve, M., Seifert, J.P.: Software mitigations to hedge AES against cache-based software side channel vulnerabilities. Cryptology ePrint Archive, Report 2006/052 (2006) http://eprint.iacr.org/
    • (2006)
    • Brickell, E.1    Graunke, G.2    Neve, M.3    Seifert, J.P.4
  • 4
    • 38349015017 scopus 로고    scopus 로고
    • Neve, M., Seifert, J.-P.: Advances on access-driven cache attacks on AES. In: Biham, E., Youssef. A.M. (eds.) SAC 2006. LNCS, 4356, pp. 147-162. Springer, Heidelberg (2007)
    • Neve, M., Seifert, J.-P.: Advances on access-driven cache attacks on AES. In: Biham, E., Youssef. A.M. (eds.) SAC 2006. LNCS, vol. 4356, pp. 147-162. Springer, Heidelberg (2007)
  • 5
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    • Osvik, D.A., Shamir, A., Tromer, E.: Cache attacks and countermeasures: The case of AES. In: Pointcheval, D. (ed.) CT-RSA 2006. LNCS, 3860, pp. 1-20. Springer, Heidelberg (2006)
    • Osvik, D.A., Shamir, A., Tromer, E.: Cache attacks and countermeasures: The case of AES. In: Pointcheval, D. (ed.) CT-RSA 2006. LNCS, vol. 3860, pp. 1-20. Springer, Heidelberg (2006)
  • 6
    • 33750814106 scopus 로고    scopus 로고
    • Bonneau, J., Mironov, I.: Cache-collision timing attacks against AES. In: Goubin, L., Matsui, M. (eds.) CHES 2006. LNCS, 4249, pp. 201-215. Springer, Heidelberg (2006)
    • Bonneau, J., Mironov, I.: Cache-collision timing attacks against AES. In: Goubin, L., Matsui, M. (eds.) CHES 2006. LNCS, vol. 4249, pp. 201-215. Springer, Heidelberg (2006)
  • 7
    • 85022027006 scopus 로고    scopus 로고
    • Aciiçmez, O., Schindler, W., Koç, Ç.K.: Cache based remote timing attack on the AES. In: Abe, M. (ed.) CT-RSA 2007. LNCS. 4377, pp. 271-286. Springer, Heidelberg (2006)
    • Aciiçmez, O., Schindler, W., Koç, Ç.K.: Cache based remote timing attack on the AES. In: Abe, M. (ed.) CT-RSA 2007. LNCS. vol. 4377, pp. 271-286. Springer, Heidelberg (2006)
  • 8
    • 33746768772 scopus 로고    scopus 로고
    • Matsui, M.: How far can we go on the x64 processors? In: Robshaw, M.J.B. (ed.) FSE 2006. LNCS, 4047, pp. 341-358. Springer, Heidelberg (2006)
    • Matsui, M.: How far can we go on the x64 processors? In: Robshaw, M.J.B. (ed.) FSE 2006. LNCS, vol. 4047, pp. 341-358. Springer, Heidelberg (2006)
  • 9
    • 84885910045 scopus 로고    scopus 로고
    • Rebeiro, C., Selvakumar, A.D., Devi, A.S.L.: Bitslice implementation of AES. In: Pointcheval, D., Mu, Y., Chen, K. (eds.) CANS 2006. LNCS, 4301, pp. 203-212. Springer, Heidelberg (2006)
    • Rebeiro, C., Selvakumar, A.D., Devi, A.S.L.: Bitslice implementation of AES. In: Pointcheval, D., Mu, Y., Chen, K. (eds.) CANS 2006. LNCS, vol. 4301, pp. 203-212. Springer, Heidelberg (2006)
  • 10
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    • A very compact Rijndael S-box (revised)
    • NPS-MA-05-001 May
    • Canright, D.: A very compact Rijndael S-box (revised). Naval Postgraduate School Technical Report, NPS-MA-05-001 (May 2005), http://handle.dtic.mil/100. 2/ADA427050
    • (2005) Naval Postgraduate School Technical Report
    • Canright, D.1
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    • A compact Rijndael hardware architecture with S-box optimization
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    • Satoh, A., Morioka, S., Takano, K., Munetoh, S.: A compact Rijndael hardware architecture with S-box optimization. In: Boyd, C. (ed.) ASIACRYPT 2001. LNCS, vol. 2248, pp. 239-254. Springer, Heidelberg (2001)
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