Time-bounded authentication of FPGAs

IEEE Transactions on Information Forensics and Security

Volumn 6, Issue 3 PART 2, 2011, Pages 1123-1135

  Majzoobi, Mehrdad ^a   Koushanfar, Farinaz ^a  

^a Rice University   (United States)

Author keywords

Delay characterization; field programmable gate arrays (FPGAs); physically unclonable function (PUF); time bounded authentication

Indexed keywords

AUTHENTICATION PROTOCOLS; BUILDING BLOCKES; CLOCK FREQUENCY; DELAY CHARACTERIZATION; LINEAR CALIBRATION; NOVEL TECHNIQUES; ON-CHIP TEMPERATURE; OPERATIONAL CONDITIONS; PHYSICALLY UNCLONABLE FUNCTION (PUF); PROOF OF CONCEPT; PULSEWIDTHS; RECONFIGURABILITY; SIGNATURE EXTRACTION; TIME CONSTRAINTS; TIME-BOUNDED AUTHENTICATION; VARIOUS ATTACKS; VOLTAGE SENSOR; VOLTAGE VARIATION;

AUTHENTICATION; CHARACTERIZATION; LOGIC GATES;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 80051746634     PISSN: 15566013     EISSN: None     Source Type: Journal    
DOI: 10.1109/TIFS.2011.2131133     Document Type: Article

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