A 4GS/s 6b flash ADC in 0.13μm CMOS

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue CIRCUITS SYMP., 2004, Pages 420-423

  Paulus, Christian ^a   Blüthgen, Hans Martin ^a   Löw, Manuel ^a   Sicheneder, Elisabeth ^a   Brüls, Nikolaus ^a   Courtois, Anne ^a   Tiebout, Marc ^a   Thewes, Roland ^a  

^a INFINEON TECHNOLOGIES AG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

COMPARATOR CIRCUITS; DATA ACQUISITION; DATA TRANSFER; DIGITAL SIGNAL PROCESSING; MOSFET DEVICES; SIGNAL DISTORTION; THERMOMETERS; THRESHOLD VOLTAGE;

DATA NETWORKS; HIGH FREQUENCY SIGNALS; SIGNAL INTEGRITY; THERMOMETER-TO-BINARY CONVERTERS;

CMOS INTEGRATED CIRCUITS;

EID: 4544381394     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. K. Poulton et al., "A 20 GS/s 8b ADC with a 1 MB Memory in 0. 18μm CMOS", Tech. Dig. ISSCC, pp. 318-319, 2003
2. X. Jiang et al., "A 2 GS/s 6b ADC in 0.18μm CMOS", Tech. Dig. ISSCC, pp. 322-323, 2003
3. M. Tiebout, "Low-Power Low-Phase-Noise Differentially Tuned Quadrature VCO Design in Standard CMOS", IEEE JSSC.pp. 1018-1024, 2001