메뉴 건너뛰기




Volumn , Issue , 2011, Pages 285-290

Advanced reliability study of TSV interposers and interconnects for the 28nm technology FPGA

Author keywords

[No Author keywords available]

Indexed keywords

ACTIVE DEVICES; ASSEMBLY PROCESS; ELECTRICAL PERFORMANCE; FABRICATION PROCESS; HIGH RELIABILITY; LEAD-FREE; MATERIAL SELECTION; MICRO-BUMPS; MODELING AND SIMULATION; MOISTURE SENSITIVITY; OPTIMIZE DESIGN; ORGANIC SUBSTRATE; PACKAGED DEVICE; PROCESS TECHNOLOGIES; TEST CHIPS; THROUGH-SILICON-VIA; WARPAGES; WIRING DENSITY;

EID: 79960389592     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECTC.2011.5898527     Document Type: Conference Paper
Times cited : (176)

References (12)
  • 4
    • 0022218769 scopus 로고
    • Constitutive equations for hot-working of metals
    • Anand L, "Constitutive equations for hot-working of metals", International Journal of Plasticity, Vo l 1, pp. 213-231, 1985.
    • (1985) International Journal of Plasticity , vol.1 , pp. 213-231
    • Anand, L.1
  • 5
    • 0034479828 scopus 로고    scopus 로고
    • Effect of simulation methodology on solder joint crack growth correction
    • Darveaux R, "Effect of simulation methodology on solder joint crack growth correction", ECTC, Conference Proceedings, pp. 1048-1058, 2000.
    • (2000) ECTC, Conference Proceedings , pp. 1048-1058
    • Darveaux, R.1
  • 9
    • 70349676561 scopus 로고    scopus 로고
    • Design guidance for the mechanical reliability of Low-k flip-chip BGA package
    • Chang K C, Yuan L, Lin C Y, Lii M J, "Design guidance for the mechanical reliability of Low-k flip-chip BGA package", IEEE, 2006.
    • (2006) IEEE
    • Chang, K.C.1    Yuan, L.2    Lin, C.Y.3    Lii, M.J.4
  • 10
    • 70349697203 scopus 로고    scopus 로고
    • Advanced reliability modeling of Cu/Low-k interconnection in FCBGA package
    • Fiori V, Zhang X, Tee T Y, "Advanced reliability modeling of Cu/Low-k interconnection in FCBGA package", IEEE, 2006.
    • (2006) IEEE
    • Fiori, V.1    Zhang, X.2    Tee, T.Y.3
  • 11
    • 70349691080 scopus 로고    scopus 로고
    • Investigation of residual stress in wafer level interconnect structures induced by wafer processing
    • Wang G, Gan D, Groothuis S, Ho P S, "Investigation of residual stress in wafer level interconnect structures induced by wafer processing", IEEE, 2006.
    • (2006) IEEE
    • Wang, G.1    Gan, D.2    Groothuis, S.3    Ho, P.S.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.