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Volumn , Issue , 2011, Pages 1622-1625

Silicon-based wafer-level packaging for cost reduction of high brightness LEDs

Author keywords

[No Author keywords available]

Indexed keywords

ACTIVE REGIONS; DEVICE PERFORMANCE; DIRECT INTEGRATION; DRIVER IC; HEAT CONDUCTANCE; HIGH BRIGHTNESS LEDS; HIGH THERMAL; HIGH YIELD; IC INDUSTRY; LIGHTING APPLICATIONS; METAL BONDING; OVERALL EFFICIENCY; PACKAGING COSTS; POTENTIAL SOLUTIONS; PROCESSING TECHNOLOGIES; REDUCING COSTS; SILICON-BASED; SMALL FORM FACTORS; THROUGH SILICON VIAS; WAFER LEVEL; WAFER LEVEL PACKAGING;

EID: 79960384145     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECTC.2011.5898728     Document Type: Conference Paper
Times cited : (17)

References (12)
  • 2
    • 33747625440 scopus 로고    scopus 로고
    • Silicon-based packaging platform for light emitting diode
    • C. F. Tsou, and Y. S. Huang, "Silicon-based packaging platform for light emitting diode", IEEE Trans. Adv. Packag., 2006, 29, (3), pp. 607-614
    • (2006) IEEE Trans. Adv. Packag. , vol.29 , Issue.3 , pp. 607-614
    • Tsou, C.F.1    Huang, Y.S.2
  • 8
    • 33846861325 scopus 로고    scopus 로고
    • EMC-3D consortium targets cost effective TSV interconnects
    • February
    • B. Kim, "EMC-3D Consortium Targets Cost effective TSV Interconnects", Semiconductor International, February (2007).
    • (2007) Semiconductor International
    • Kim, B.1
  • 11
    • 79960387519 scopus 로고    scopus 로고
    • Advanced chip-to-wafer bonding enabling silicon-in-package (SiP) production with low cost of ownership
    • May/June
    • A. Sigl, G. Oakes, P. Kettner, C. Pichler and C. Scheiring, "Advanced Chip-to-Wafer bonding enabling silicon-in-package (SiP) production with low cost of ownership", Chip Scale Review, 2010 (May/June) pp. 12-17
    • (2010) Chip Scale Review , pp. 12-17
    • Sigl, A.1    Oakes, G.2    Kettner, P.3    Pichler, C.4    Scheiring, C.5


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.