Building blocks for spikes signals processing

Proceedings of the International Joint Conference on Neural Networks

Volumn , Issue , 2010, Pages

  Jimenez Fernandez, A ^a   Linares Barranco, A ^a   Paz Vicente, R ^a   Jimenez G ^a   Civit, A ^a  

^a UNIVERSITY OF SEVILLE   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

DIGITAL ARITHMETIC; INFORMATION USE; SIGNAL PROCESSING;

BUILDING BLOCKES; DIGITAL PULSE; INFORMATION REPRESENTATION; NEUROMORPHIC; PRE-PROCESSING; PROCESS INFORMATION; ROBUSTNESS TO NOISE; SIGNAL-PROCESSING; SPIKE SIGNALS; TRANSMISSION TIME;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 79959440034     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IJCNN.2010.5596845     Document Type: Conference Paper

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