Efficient method to compute minimum decision chains of Boolean functions

Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI

Volumn , Issue , 2011, Pages 419-422

  Martins, Mayler G A ^a   Callegaro, Vinicius ^a   Ribas, Renato P ^a   Reis, Andre I ^a  

^a FEDERAL UNIVERSITY OF RIO GRANDE DO SUL   (Brazil)

Author keywords

Boolean functions; Decision chains; Transistor stacks

Indexed keywords

ARBITRARY FUNCTIONS; DECISION CHAINS; EFFICIENT METHOD; LOGIC SYNTHESIS; PERFORMANCE ANALYSIS; TRANSISTOR STACKS;

COMPUTATION THEORY; LAKES;

BOOLEAN FUNCTIONS;

EID: 79957777320     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1973009.1973098     Document Type: Conference Paper

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