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Volumn , Issue , 2010, Pages

Logic-on-logic 3D integration and placement

Author keywords

[No Author keywords available]

Indexed keywords

3-D INTEGRATION; ADVANCED ENCRYPTION STANDARD; ANALYTICAL PLACEMENT; CLOCK SPEED; MICRO-BUMPS; MULTIPLE INPUT AND MULTIPLE OUTPUTS; PLACEMENT ALGORITHM; PLACEMENT TOOLS; POWER CONSUMPTION; PROCESSING ELEMENTS; STANDARD-CELL PLACEMENT;

EID: 79955954927     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/3DIC.2010.5751451     Document Type: Conference Paper
Times cited : (17)

References (15)
  • 7
    • 33947407658 scopus 로고    scopus 로고
    • Three-dimensional integrated circuits and the future of system-on-chip designs
    • June
    • R. Patti, "Three-dimensional integrated circuits and the future of system-on-chip designs," Proceedings of the IEEE, vol. 94, no. 6, pp. 1214-1224, June 2006.
    • (2006) Proceedings of the IEEE , vol.94 , Issue.6 , pp. 1214-1224
    • Patti, R.1
  • 8
    • 79955973071 scopus 로고    scopus 로고
    • Interlocking conductor method for bonding wafers to produce stacked integrated circuits
    • U.S. Patent 6 838 774, January 4
    • -, "Interlocking conductor method for bonding wafers to produce stacked integrated circuits," U.S. Patent 6 838 774, January 4 2005.
    • (2005)
    • Patti, R.1
  • 9
    • 79955952889 scopus 로고    scopus 로고
    • Available
    • Tezzaron. Wafer stack with super-contacts. [Online]. Available: http://www.tezzaron.com/about/PhotoAlbum/Products/Wafer-Pair-Super-Contacts.html
    • Wafer Stack with Super-contacts. [Online]
  • 13
    • 0029208379 scopus 로고
    • Routing in a three-dimensional chip
    • jan.
    • C. C. Tong and C.-L. Wu, "Routing in a three-dimensional chip," Computers, IEEE Transactions on, vol. 44, no. 1, pp. 106-117, jan. 1995.
    • (1995) Computers, IEEE Transactions on , vol.44 , Issue.1 , pp. 106-117
    • Tong, C.C.1    Wu, C.-L.2
  • 14
    • 79955944395 scopus 로고    scopus 로고
    • Reconfigurable five layer 3d integrated memory-on-logic synthetic aperture radar processor
    • To appear in dec.
    • T. Thorolfsson, N. Moezzi-Madani, and P. D. Franzon, "Reconfigurable five layer 3d integrated memory-on-logic synthetic aperture radar processor," To appear in Computers Digital Techniques, IET, vol. 4, no. 6, dec. 2010.
    • (2010) Computers Digital Techniques, IET , vol.4 , Issue.6
    • Thorolfsson, T.1    Moezzi-Madani, N.2    Franzon, P.D.3
  • 15
    • 84882536619 scopus 로고
    • An algorithm for path connections and its applications
    • C. Lee, "An algorithm for path connections and its applications," IRE Transactions on Electronic Computers, vol. 10, no. 2, pp. 346-365, 1961.
    • (1961) IRE Transactions on Electronic Computers , vol.10 , Issue.2 , pp. 346-365
    • Lee, C.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.