6W/25mm2 inductive power transfer for non-contact wafer-level testing

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2011, Pages 230-231

  Radecki, Andrzej ^a   Chung, Hayun ^a   Yoshida, Yoichi ^a   Miura, Noriyuki ^a   Shidei, Tsunaaki ^a   Ishikuro, Hiroki ^a   Kuroda, Tadahiro ^a  

^a KEIO UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN FOR TESTABILITY; DIELECTRIC MATERIALS; ELECTROMAGNETIC INDUCTION; ENERGY TRANSFER; LOW-K DIELECTRIC; PROBES;

FABRICATION PROCESS; INDUCTIVE COUPLINGS; INDUCTIVE POWER TRANSFER; INVASIVE TECHNIQUES; MANUFACTURING ERRORS; MODERN HIGH PERFORMANCE; NONFUNCTIONAL DEVICES; WAFER LEVEL TESTING;

INDUCTIVE POWER TRANSMISSION;

EID: 79955746740     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2011.5746297     Document Type: Conference Paper

References (6)

1. Y. Yuxiang, et al., "Simultaneous 6Gb/s Data and 10mW Power Transmission using Nested Clover Coils for Non-Contact Memory Card," Symp.on VLSI Cir, pp. 199-200, Jun. 2010.
2. N. Miura, et al., "An 11Gb/s Inductive-Coupling Link with Burst Transmission," ISSCC Dig. Tech. Papers, pp. 298-299, Feb. 2008.
3. Y. Yoshida, et al., "Wireless DC voltage transmission using inductive-coupling channel for highly-parallel wafer-level testing" ISSCC Dig. Tech. Papers, pp. 470-471, Feb. 2009.
4. C. V. Sellathamby, et al., "Non-contact Wafer Probe Using Wireless Probe Cards," IEEE International Test Conference, 6 pp. - 452, Nov. 2005.
5. S. Slupsky, et al., "A Non-Contact Interconnect Technology for Reducing Semiconductor Chip Cost," CMOS Emerging Technologies Workshop, 2006.
6. S. Guo, et al., "An Efficiency-Enhanced CMOS Rectifier With Unbalanced-Biased Comparators for Transcutaneous-Powered High-Current Implants," IEEE J. Solid-State Circuits, vol. 44, no. 6, pp. 1796-1804, Jun. 2009.