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Volumn , Issue , 2009, Pages 470-472

Wireless DC voltage transmission using inductive-coupling channelfor highly-parallel wafer-level testing

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[No Author keywords available]

Indexed keywords


EID: 70349272856     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2009.4977512     Document Type: Conference Paper
Times cited : (19)

References (6)
  • 1
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    • Non-contact wafer probe using wireless probe cards
    • paper 18.3, Nov.
    • C.V. Sellathamby, et al., "Non-contact Wafer Probe Using Wireless Probe Cards," Proc. International Test Conference, paper 18.3, Nov. 2005.
    • (2005) Proc. International Test Conference
    • Sellathamby, C.V.1
  • 2
    • 49549087966 scopus 로고    scopus 로고
    • An 11Gb/s inductive-coupling link with burst transmission
    • Feb.
    • N. Miura, et al., "An 11Gb/s Inductive-Coupling Link with Burst Transmission," ISSCC Dig. Tech. Papers, pp. 298-299, Feb. 2008.
    • (2008) ISSCC Dig. Tech. Papers , pp. 298-299
    • Miura, N.1
  • 3
    • 33748367892 scopus 로고    scopus 로고
    • 1.2-V low-power multi-mode DAC+filter blocks for reconfigurable (WLAN/UMTS, WLAN/bluetooth) transmitters
    • Sept.
    • N. Ghittori, et al., "1.2-V Low-power Multi-mode DAC+filter Blocks for Reconfigurable (WLAN/UMTS, WLAN/bluetooth) Transmitters," IEEE J. Solid-State Circuits, pp. 1970- 1982, Sept. 2006.
    • (2006) IEEE J. Solid-State Circuits , pp. 1970-1982
    • Ghittori, N.1
  • 4
    • 4544273478 scopus 로고    scopus 로고
    • A sampling oscilloscope macro toward feedback physical design methodology
    • June
    • M. Takamiya, et al., "A Sampling Oscilloscope Macro toward Feedback Physical Design Methodology," IEEE Symp. VLSI Circuits, pp. 240-243, June 2004.
    • (2004) IEEE Symp. VLSI Circuits , pp. 240-243
    • Takamiya, M.1
  • 5
    • 0029404872 scopus 로고
    • A 3.3 V 32 Mb NAND flash memory with incremental step pulse programming scheme
    • Nov.
    • K. Suh, et al., "A 3.3 V 32 Mb NAND Flash Memory with Incremental Step Pulse Programming Scheme," IEEE J. Solid-State Circuits, pp. 1149-1156, Nov. 1995.
    • (1995) IEEE J. Solid-state Circuits , pp. 1149-1156
    • Suh, K.1
  • 6
    • 70349295719 scopus 로고    scopus 로고
    • Circuit design for power management building blocks
    • June
    • Wing-Hung Ki, "Circuit Design for Power Management Building Blocks," IEEE Symp. VLSI Circuits Short Course, pp. 30-31, June 2008.
    • (2008) IEEE Symp. VLSI Circuits Short Course , pp. 30-31
    • Ki, W.-H.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.