A low-cost wear-leveling algorithm for block-mapping solid-state disks

Proceedings of the ACM SIGPLAN Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES)

Volumn , Issue , 2011, Pages 31-40

  Chang, Li Pin ^a   Huang, Li Chun ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

Flash memory; Solid state disks; Wear leveling

Indexed keywords

ADAPTIVENESS; CRITICAL ISSUES; END USERS; IMPLEMENTATION COST; MULTILEVEL FLASH MEMORY; ONLINE TUNING; STORAGE DENSITIES; STORAGE DEVICES; TRACE DRIVEN SIMULATION; WEAR LEVELING; WEAR-LEVELING ALGORITHMS;

ALGORITHMS; DATA STRUCTURES; DESIGN; EMBEDDED SYSTEMS; PROGRAM COMPILERS; VIRTUAL STORAGE;

FLASH MEMORY;

EID: 79955674953     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1967677.1967683     Document Type: Conference Paper

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