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Volumn , Issue , 2011, Pages 483-487
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Issues and challenges in development of massively-parallel heterogeneous MPSOCS based on adaptable ASIPs
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Author keywords
architecture synthesis; customizable ASIPs; embedded systems; heterogeneous multi processor system on chip (MPSoC); MPSoC and ASIP design automation
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Indexed keywords
APPLICATION MAPPING;
APPLICATION SPECIFIC INSTRUCTION SET PROCESSOR;
ARCHITECTURE SYNTHESIS;
ARTEMIS;
COST EFFICIENCY;
CUSTOMIZABLE;
CUSTOMIZABLE ASIPS;
DESIGN AND DEVELOPMENT;
DESIGN METHOD;
ELECTRONIC DESIGN AUTOMATION TOOLS;
ELECTRONIC TECHNOLOGIES;
EMBEDDED APPLICATION;
EUROPEAN PROJECT;
HETEROGENEOUS MULTI-PROCESSOR SYSTEM-ON-CHIP (MPSOC);
HIGH DEMAND;
INTEGRATED SYSTEMS;
ISSUES AND CHALLENGES;
MPSOC AND ASIP DESIGN AUTOMATION;
MULTI PROCESSOR SYSTEMS;
REAL-TIME COMPUTATIONS;
SINGLE CHIPS;
SYSTEM ARCHITECTURES;
APPLICATION SPECIFIC INTEGRATED CIRCUITS;
AUTOMATION;
COMPUTER AIDED DESIGN;
COMPUTER ARCHITECTURE;
INTEGRATED OPTICS;
MICROPROCESSOR CHIPS;
NETWORK ARCHITECTURE;
PARALLEL PROCESSING SYSTEMS;
PROGRAMMABLE LOGIC CONTROLLERS;
EMBEDDED SYSTEMS;
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EID: 79955048560
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/PDP.2011.55 Document Type: Conference Paper |
Times cited : (7)
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References (8)
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