Low power field programmable gate array implementation of fast digital signal processing algorithms: Characterisation and manipulation of data locality

IET Computers and Digital Techniques

Volumn 5, Issue 2, 2011, Pages 136-144

  McKeown, S ^a   Woods, R ^a  

^a QUEEN'S UNIVERSITY BELFAST   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

COSINE TRANSFORMS; DIGITAL SIGNAL PROCESSING; ELECTRIC POWER UTILIZATION; FAST FOURIER TRANSFORMS; HADAMARD TRANSFORMS; LOGIC GATES; SIGNAL RECEIVERS; SPACE POWER GENERATION; WALSH TRANSFORMS;

CIRCUIT STRUCTURES; DIGITAL SIGNAL PROCESSING ALGORITHMS; DYNAMIC POWER CONSUMPTION; FIELD-PROGRAMMABLE GATE ARRAY IMPLEMENTATIONS; REDUCED POWER CONSUMPTION; RELATIVE INDICES; SOFTWARE IMPLEMENTATION; WALSH HADAMARD TRANSFORMS;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 79952382471     PISSN: 17518601     EISSN: None     Source Type: Journal    
DOI: 10.1049/iet-cdt.2010.0052     Document Type: Article

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