Voltage polarity effects in GST-based phase change memory: Physical origins and implications

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2010, Pages

  Padilla, A ^a   Burr, G W ^a   Virwani, K ^a   Debunne, A ^a   Rettner, C T ^a   Topuria, T ^a   Rice, P M ^a   Jackson, B ^a   Dupouy, D ^a   Kellock, A J ^a   Shelby, R M ^a   Gopalakrishnan, K ^a   Shenoy, R S ^a   Kurdi, B N ^a  

^a IBM ALMADEN RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BIAS POLARITY; CRYSTALLIZATION PROCESS; DEVICE FAILURES; ELEMENTAL SEGREGATION; MATERIALS DESIGN; VOLTAGE POLARITY;

ELECTRON DEVICES;

PHASE CHANGE MEMORY;

EID: 79951834368     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2010.5703444     Document Type: Conference Paper

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