ReMAP: A reconfigurable architecture for chip multiprocessors

IEEE Micro

Volumn 31, Issue 1, 2011, Pages 65-77

  Watkins, Matthew A ^a   Albonesi, David H ^b  

^a HARVEY MUDD COLLEGE   (United States)

^b Department of Obstetrics Gynecology   (United States)

Author keywords

chip multiprocessors; fine grained communication; reconfigurable architecture; ReMAP; specialized programmable logic

Indexed keywords

CHIP MULTIPROCESSOR; FINE-GRAINED COMMUNICATION; RECONFIGURABLE ARCHITECTURE; REMAP; SPECIALIZED PROGRAMMABLE LOGIC;

COMMUNICATION; ENERGY EFFICIENCY; MICROPROCESSOR CHIPS; SYSTEMS ANALYSIS;

MULTIPROCESSING SYSTEMS;

EID: 79951829503     PISSN: 02721732     EISSN: None     Source Type: Journal    
DOI: 10.1109/MM.2011.14     Document Type: Article

References (9)

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