Understanding of short-channel mobility in Tri-Gate nanowire MOSFETs and enhanced stress memorization technique for performance improvement

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2010, Pages

  Saitoh, Masumi ^a   Nakabayashi, Yukio ^a   Ota, Kensuke ^a   Uchida, Ken ^b   Numata, Toshinori ^a  

^a TOSHIBA CORPORATION   (Japan)

^b TOKYO INSTITUTE OF TECHNOLOGY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPRESSIVE STRAIN; NANOWIRE MOSFETS; NANOWIRE TRANSISTORS; PERFORMANCE IMPROVEMENTS; SHORT-CHANNEL MOBILITY; STRESS MEMORIZATION TECHNIQUES; TRIGATE;

ELECTRON DEVICES;

NANOWIRES;

EID: 79951822597     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2010.5703475     Document Type: Conference Paper

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