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Volumn , Issue , 2010, Pages 994-998

Performance evaluation of channel coding for Gbps 60-GHz OFDM-based wireless communications

Author keywords

60 GHz wireless communication; Convolutional code; LDPC code; OFDM

Indexed keywords

CMOS TECHNOLOGY; FRAME ERROR RATE; HARDWARE COMPLEXITY; LDPC CODES; LDPC DECODER; OFDM; PERFORMANCE EVALUATION; PERFORMANCE PARAMETERS; TWO PARAMETER; WIRELESS COMMUNICATION SYSTEM; WIRELESS COMMUNICATIONS;

EID: 78751492137     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/PIMRC.2010.5671892     Document Type: Conference Paper
Times cited : (12)

References (12)
  • 1
    • 78751557623 scopus 로고    scopus 로고
    • Available
    • WIGWAM project : Available : http://www.wigwam-project.de
  • 4
    • 78751526246 scopus 로고    scopus 로고
    • Available
    • EASY-A project: Available : http://www.easy-a.de.
  • 5
    • 78751562318 scopus 로고    scopus 로고
    • Next-Generation wireless OFDM system for 60-GHz short-range communication at a data rate of 2.6 GBit/s
    • M.Piz, E.Grass, M.Marinkovic, R.Kraemer: "Next-Generation wireless OFDM system for 60-GHz short-range communication at a data rate of 2.6 GBit/s" OFDM-workshop TU Hamburg 2009.
    • OFDM-workshop TU Hamburg 2009
    • Piz, M.1    Grass, E.2    Marinkovic, M.3    Kraemer, R.4
  • 6
    • 78751517145 scopus 로고    scopus 로고
    • IEEE 802.16e, IEEE P802.16e-2005, Oct.
    • IEEE 802.16e, WiMAX Standard, IEEE P802.16e-2005, Oct. 2005
    • (2005) WiMAX Standard
  • 9
    • 0036504121 scopus 로고    scopus 로고
    • A 690-mW 1-Gb/s 1024-b,rate-1/2 Low-Density Parity-Check Decoder
    • Mar.
    • A.J.Blanksbay, C.J. Howland: "A 690-mW 1-Gb/s 1024-b,rate-1/2 Low-Density Parity-Check Decoder, "IEEE J.Solid-State Circuits, vol. 37, pp.404-412, Mar. 2002.
    • (2002) IEEE J.Solid-State Circuits , vol.37 , pp. 404-412
    • Blanksbay, A.J.1    Howland, C.J.2
  • 10
    • 34548853171 scopus 로고    scopus 로고
    • Efficient Message Passing Architecture for High-Throughput LDPC Decoders
    • Z.Cui, Z. Wang: "Efficient Message Passing Architecture for High-Throughput LDPC Decoders", Proc. IEEE ISCAS, May 2007, pp. 917-920
    • Proc. IEEE ISCAS, May 2007 , pp. 917-920
    • Cui, Z.1    Wang, Z.2
  • 11
    • 33646533730 scopus 로고    scopus 로고
    • Loosely coupled memory-based decoding architecture for low density parity check codes
    • May
    • S.H.Kang, I.C Park: "Loosely coupled memory-based decoding architecture for low density parity check codes, "IEEE Trans. Circuits Syst. I, vol. 53, no.5, pp. 1045-1056, May 2006
    • (2006) IEEE Trans. Circuits Syst. I , vol.53 , Issue.5 , pp. 1045-1056
    • Kang, S.H.1    Park, I.C.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.