Design and implementation of a parallel turbo-decoder ASIC for 3GPP-LTE

IEEE Journal of Solid-State Circuits

Volumn 46, Issue 1, 2011, Pages 8-17

  Studer, Christoph ^a   Benkeser, Christian ^a   Belfanti, Sandro ^b   Huang, Quiting ^a  

^a ETH ZURICH   (Switzerland)

^b NONE

Author keywords

3G mobile communication; ASIC implementation; low power; LTE; parallel turbo decoder; radix 4

Indexed keywords

3G MOBILE COMMUNICATION; ASIC IMPLEMENTATION; LOW POWER; LTE; PARALLEL TURBO-DECODER; RADIX-4;

CMOS INTEGRATED CIRCUITS; COMPUTATIONAL COMPLEXITY; DECODING; DESIGN; ELECTRIC POWER SUPPLIES TO APPARATUS; WIRELESS TELECOMMUNICATION SYSTEMS;

MOBILE TELECOMMUNICATION SYSTEMS;

EID: 78650866378     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2010.2075390     Document Type: Conference Paper

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