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Volumn , Issue , 2008, Pages 74-80

Applying speculation techniques to implement functional units

Author keywords

Functional units design; High performance.; Prediction techniques

Indexed keywords

AREA OVERHEADS; ASYNCHRONOUS CIRCUITS; BASIC IDEAS; BRANCH PREDICTIONS; DESIGN TECHNIQUES; FULL ADDERS; FUNCTIONAL UNITS DESIGN; HIGH-PERFORMANCE.; LOW AREAS; PERFORMANCE IMPROVEMENTS; PREDICTION TECHNIQUES; SYNCHRONOUS CIRCUITS;

EID: 78650760155     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCD.2008.4751843     Document Type: Conference Paper
Times cited : (9)

References (21)
  • 1
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    • Hitting the Memory wall:Implications of the Obvious
    • March
    • Wm. A. Wulf and Sally A McKee. "Hitting the Memory wall:Implications of the Obvious". Computer Architecture News, 23(1),pp. 20-24, March 1995.
    • (1995) Computer Architecture News , vol.23 , Issue.1 , pp. 20-24
    • Wulf, W.A.1    McKee, S.A.2
  • 2
    • 0008446869 scopus 로고
    • Checked carry select adder
    • R.B.Freeman, "Checked carry select adder", IBM Tech. DisclosureBull., 1970, 13, (6), pp. 1504-1505
    • (1970) IBM Tech. DisclosureBull , vol.13 , Issue.6 , pp. 1504-1505
    • Freeman, R.B.1
  • 5
    • 0032647245 scopus 로고    scopus 로고
    • A 16-bit carry lookahead adder using reversible energy recovery logic
    • June
    • J.Lim, D.G. Kim and S.I. Chae, "A 16-bit carry lookahead adder using reversible energy recovery logic". IEEE Journal Solid-State Circuits, vol 34., no 6. June 1999.
    • (1999) IEEE Journal Solid-State Circuits , vol.34 , Issue.6
    • Lim, J.1    Kim, D.G.2    Chae, S.I.3
  • 8
    • 0035520938 scopus 로고    scopus 로고
    • Probabilistic carry state estimate for improved asynchronous adder performance
    • W.F. Wallace, S.S. Dlay and O.R. Hinton. "Probabilistic carry state estimate for improved asynchronous adder performance", IEE Proc. Comput. Digit. Tech., 2001, 148, (6), pp. 221-226.
    • (2001) IEE Proc. Comput. Digit. Tech , vol.148 , Issue.6 , pp. 221-226
    • Wallace, W.F.1    Dlay, S.S.2    Hinton, O.R.3
  • 9
    • 27844582610 scopus 로고    scopus 로고
    • Adder methodology and design using probabilistic multiple carry estimates
    • E.M. Ashmila, S. Dlay, O. Hinton. "Adder methodology and design using probabilistic multiple carry estimates", IEE Proc. Comput. Digit. Tech., 2005, 152, (6), pp. 697-703.
    • (2005) IEE Proc. Comput. Digit. Tech , vol.152 , Issue.6 , pp. 697-703
    • Ashmila, E.M.1    Dlay, S.2    Hinton, O.3
  • 15
    • 62349096145 scopus 로고    scopus 로고
    • 40, 32, 24, 16 kbits/s Adaptative Differential Pulse Code Modulation (ADPCM). Recommendation G.726. ITU
    • 40, 32, 24, 16 kbits/s Adaptative Differential Pulse Code Modulation (ADPCM). Recommendation G.726. ITU
  • 21
    • 62349125471 scopus 로고    scopus 로고
    • IEEE Standard for Binary Floating-Point Arithmetic. New York: ANSI/IEEE, Std. 754-1985, Aug. 1985.
    • IEEE Standard for Binary Floating-Point Arithmetic. New York: ANSI/IEEE, Std. 754-1985, Aug. 1985.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.