AVISPA: A massively parallel reconfigurable accelerator

2003 International Symposium on System-on-Chip, SoC 2003 - Proceedings

Volumn , Issue , 2003, Pages 165-168

  Leijten, Jeroen ^a   Burns, Geoffrey ^a   Huisken, Jos ^a   Waterlander, Erwin ^a   Van Wei, Antoine ^a  

^a Silicon Hive   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

CO-PROCESSORS; COMPILER DESIGN; EMBEDDED COMPUTING; ITS ARCHITECTURE; MARKET UNCERTAINTY; NON RECURRING ENGINEERING; PROGRAMMABLE PLATFORMS; PROGRAMMING TOOLS; RE-CONFIGURABLE; REAL TIME PERFORMANCE; SOFTWARE-DEFINED RADIOS; TOOL GENERATION;

ACCELERATION; APPLICATION SPECIFIC INTEGRATED CIRCUITS; BENCHMARKING; BRIDGES; COMPUTATIONAL EFFICIENCY; DIGITAL RADIO; PARTICLE ACCELERATORS; PROGRAMMABLE LOGIC CONTROLLERS; SIGNAL PROCESSING; STANDARDS;

PROGRAM COMPILERS;

EID: 78650056366     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)

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