Systems-on-chip: What are the limits?

Electronics and Communication Engineering Journal

Volumn 13, Issue 6, 2001, Pages 249-255

  Roza, Engel ^a  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL METHODS; DIGITAL SIGNAL PROCESSING; INTEGRATED CIRCUIT LAYOUT; MICROPROCESSOR CHIPS; SILICON;

INTRINSIC COMPUTATIONAL EFFICIENCY (ICE); SYSTEMS-ON-CHIP DESIGN;

CHIP SCALE PACKAGES;

EID: 0035686502     PISSN: 09540695     EISSN: None     Source Type: Journal    
DOI: 10.1049/ecej:20010602     Document Type: Article

References (10)

1. Architecture-driven synthesis techniques for VLSI implementation of algorithms
2. PHIDEO: A silicon compiler for high-speed algorithms
3. PROPHID: A data-driven multi-processor architecture for high-performance DSP
4. A video signal processor for motion- compensated field-rate up-conversion in consumer television
5. A power-efficient single-chip OFDM- demodulator and channel-decoder for multimedia broadcasting
6. I.McIC: A single-chip MPEG2 video encoder for storage
7. Heterogeneous multiprocessor for the management of real-time video and graphics streams
8. High speed: Not the only way to exploit the intrinsic computational power of silicon