A 25 Gb/s × 4-channel 74 mW/ch transimpedance amplifier in 65 nm CMOS

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 2010, Pages

  Takemoto, Takashi ^a,b   Yuki, Fumio ^a,b   Yamashita, Hiroki ^a,b   Tsuji, Shinji ^a,b   Saito, Tatsuya ^a   Nishimura, Shinji ^a,b  

^a HITACHI LTD   (Japan)

^b PHOTONICS ELECTRONICS TECHNOLOGY RESEARCH ASSOCIATION PETRA   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH PRODUCT; CMOS TECHNOLOGY; DATA RATES; DC POWER; FLAT FREQUENCY RESPONSE; INPUT POWER; MULTI-CHANNEL; OUTPUT DRIVERS; POWER PENALTY; TRANS-IMPEDANCE GAIN; TRANSIMPEDANCE; TRANSIMPEDANCE AMPLIFIERS; TRANSMISSION LOSS;

BIT ERROR RATE; CMOS INTEGRATED CIRCUITS; DC POWER TRANSMISSION; FREQUENCY RESPONSE; INTEGRATED CIRCUIT MANUFACTURE; INTEGRATED CIRCUITS; WAVE TRANSMISSION;

DIFFERENTIAL AMPLIFIERS;

EID: 78649883318     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CICC.2010.5617420     Document Type: Conference Paper

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